Surmounting Erase-Operation Limit in Organic Charge-Trap Memories by Fine Tuning Electron Injection at Semiconductor/Heterobimetallic Electrode Contacts

ACS Appl Mater Interfaces. 2024 Dec 11. doi: 10.1021/acsami.4c17183. Online ahead of print.

Abstract

Heterobimetallic systems (HBS), known for their ability to facilitate the versatile design of surface workfunctions, offer significant potential as an electron-injection electrode layer for organic semiconductors. In this paper, we propose a universal and effective strategy to overcome the limitations of the erase operation in charge-trap memory with a small-bandgap organic semiconductor or diketopyrrolopyrrole-quaterthiophene-conjugated polymer (PDPP4T) by utilizing HBS-based source/drain (SD) electrodes. Conventional gold SD electrodes restrict electron injection into the PDPP4T layer during the electrical erase operation and impose a lower limit on the erasing voltage required for full threshold-voltage recovery. The HBS SD electrodes with an upshifted Fermi level toward the lowest unoccupied molecular orbital level of PDPP4T enhanced electron injection during an electrical erase operation, reducing the erasing voltage and achieving a balance between programming and erasing voltages. In addition, an asymmetric SD structure was employed for preventing a decrease in the on-state drain current while maintaining an optimal erase operation.

Keywords: charge-trap memory; electrical erase operation; electron-injection electrode layer; erasing voltage; heterobimetallic system; small-bandgap organic semiconductor.