The successful integration of capacitive phase shifters featuring a p-type strained SiGe layer in a 300 mm silicon photonics platform is presented. The phase shift is evaluated with a voltage swing of only 0.9 Vpp, compatible with CMOS technology. A good correlation is shown between the phase shift efficiency from 10 to 60°/mm and the capacitive oxide thickness varying from 15 to 4 nm. Corresponding insertion losses are as low as 3 dB/mm thanks to the development of low loss poly-silicon and to a careful design of the doped layers within the waveguide. The thin SiGe layer brings an additional 20% gain in efficiency due to higher hole efficiency in strained SiGe.